Current cell search in a Node B of a TDD system is based upon the use of the downlink synchronization (sync) timeslot. A ten (10) ms frame comprises two (2) subframes, each having a five (5) ms duration. Both subframes in a frame have the same overall structure. In principle, the meaning of “frame” is less relevant in low-chip rate (LCR) TDD, since a subframe is the basic repeating uplink (UL) and downlink (DL) time structure in a LCR TDD system.
The structure of a subframe is shown in FIG. 1. The subframe includes a Primary Common Control Physical Channel (P-CCPCH), a Downlink Pilot Timeslot (DwPTS), a Guard Period (GP) and an Uplink Pilot Timeslot (UpPTS). The first timeslot in the subframe is always used for the (DL) P-CCPCHs carrying the Broadcast Channel (BCH). The DwPTS field is used as a synchronization signal and includes a 32 chip guard period followed by a 64 chip DL sync code.
Since there is a one-to-one correspondence between scrambling codes and basic midamble codes in a TDD synchronously operating system, user signals are scrambled by 1 out of N scrambling codes, and 1 out of N basic midamble codes are used for channel estimation in a burst. Typically N is equal to 128. Furthermore, L scrambling codes-basic midambles belong to 1 out of M code groups. Since M is typically 32, and L=N/M, in the present example L=4. Each of the M code groups is indicated by a particular DL sync sequence in the DwPTS field. Neighboring Node Bs send a different DL sync sequence in their respective DwPTS fields.
The task of cell search is to identify the DL sync codes transmitted by a Node B, in order for the mobile or stationary user equipment (UE) to establish communications with the Node B. For example, a typical cell search must identify 1 out of 32 DL sync sequences by correlating each of 6400 chip positions in the five (5) ms subframe with each of 32 possible DL sync sequences in the system. Once a particular DL sync sequence is identified, (and since it is known that the P-CCPCH is using 1 out of 4 scrambling codes, each one tied to a particular basic midamble code), each of the four possibilities is tested by demodulating the P-CCPCH and checking with a threshold and/or CRC on its contents.
The presence of a P-CCPCH in the DL timeslot preceding the DwPTS field in the subframe, and the start of the BCH interleaving period, is indicated by a Quadrature Phase Shift Keying (QPSK) phase modulation pattern in the DwPTS field. The DL sync sequences are modulated with respect to the midamble (m(1)) in the first time slot (TS0). Four consecutive phases, (known as a phase quadruple), of the DL sync sequences are used to indicate the presence of the P-CCPCH in the following four subframes. In the case where the presence of a P-CCPCH is indicated, the next following subframe is the first subframe of the interleaving period. Since QPSK is used for the modulation of the DL sync sequences, the phases 45°, 135°, 225°, and 315° are used. The total number of different phase quadruples is 2, one for each P-CCPCH, (S1 and S2). In LCR TDD, the BCH is typically mapped to 2 physical channels, corresponding to 2 spreading codes in the same timeslot (TS) used for BCH data, (i.e. a P-CCPCH 1 known as S1 and a P-CCPCH 2 known as S2 in the DL timeslot preceding the DwPTS field). They are commonly referred to together as the “P-CCPCH”, even though if it is well understood for LCR TDD that they actually may comprise two (2) physical channels present in the same TS. A quadruple always starts with an even system frame number ((SFN mod 2)=0). Table 1 sets fort the phase quadruples and their meaning.
NamePhase QuadrupleMeaningS1135°, 45°, 225°, There is a P-CCPCH in the next 4135°subframesS2315°, 225°, 315°,There is no P-CCPCH in the next 445°subframesTable 1
Every 64 chip DL sync sequence constitutes a QPSK symbol. The BCH on the P-CCPCH is interleaved over 2 frames (20 ms). The 4 consecutive subframes in these 2 frames contain one BCH segment protected with a CRC that can be checked. The 4 DL sync sequences within the 2 frames constitute 4 QPSK symbols, every single QPSK symbol gets an individual, differential phase offset compared to some easily measurable reference, such as the midamble in the PCCPCH. A full BCH segment (20 ms of data) can only start in a frame with even System Frame Number (SFN). If the QPSK modulation sequence S1 on the DL sync sequence contained in frame number n and number n+1 indicates presence of the P-CCPCH, the P-CCPCH can be found in frame numbers n+2 and n+3. Moreover, this segment will start in the first subframe of frame number n+2. The QPSK modulation sequences are made in a way that the UE can determine unambiguously within which subframe of frame numbers n and n+1 it is located.
Presently, the DL sync sequence has a length of only 64 chips, which does not provide much spreading gain. Often, a UE cannot synchronize reliably at cell borders, resulting in cell search performance that is relatively poor. Additionally, a UE receives relatively short DL sync sequences overlapping in time from neighboring Node Bs, leading to significant cross-correlation between the DL sync sequences from different Node Bs and further deteriorating detection performance.
The complexity of current cell search systems is very high. For example, the current 32 DL sync sequences are said to be randomly chosen sequences whose mutual cross-correlations are optimized. Each of these requires full correlation, (i.e. 64 chips long). Thus correlating 6400 chip positions requires 6400×32×64=13,107,200 operations per 5 ms subframe for cell search. This is an onerous processing requirement.